| Penn Computational Intelligence Lab

Jialiang Zhang

PhD Candidate

Department of Electrical and Systems Engineering

University of Pennsylvania

Jialiang Zhang is a fourth-year PhD student advised by Prof. Jing Li. He received his B.E. degree from University of Electronic Science and Technology of China. His research focuses on hardware acceleration of big data and machine learning applications using FPGA and emerging memory technologies. He is also an expert in high speed digital system and high performance mixed-signal circuit design.

Education

MS in Communication and Information System, 2014

University of Electronic Science and Technology of China
B.E. in Network Engineering, 2012

University of Electronic Science and Technology of China

Publications (11)

MEG: A RISCV-based system simulation infrastructure for exploring memory optimization using FPGAs and Hybrid Memory Cube (Best Paper Nominee) (2019). 2019 IEEE 27th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), April, 2019
Unleashing the Power of Soft Logic for Convolutional Neural Network Acceleration via Product Quantization (Poster) (2019). the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, ser. FPGA ‘19, Feb, 2019
Efficient Large-scale Approximate Nearest Neighbor Search on the OpenCL-FPGA (2018). Conference on Computer Vision and Pattern Recognition (CVPR), Jun, 2018
PQ-CNN: Accelerating Product Quantized Convolutional Neural Network (Poster) (2018). 2018 IEEE 26th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), April, 2018
Accelerating Graph Analytics By Co-Optimizing Storage and Access on an FPGA-HMC Platform (2018). Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, ser. FPGA ‘18, Monterey, California, USA, Feb, 2018
Degree-aware Hybrid Graph Traversal on FPGA-HMC Platform (2018). Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, ser. FPGA ‘18, Monterey, California, USA, Feb, 2018
Accelerating Large-Scale Graph Analytics with FPGA and HMC (Poster) (2017). 2017 IEEE 25th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), April, 2017
Challenges and Opportunities: From Near-memory Computing to In-memory Computing (INVITED) (2017). Proceedings of the 2017 ACM on International Symposium on Physical Design, ser. ISPD ‘17, Portland, Oregon, USA, Mar, 2017
A Mixed-Signal Data-Centric Reconfigurable Architecture Enabled by RRAM Technology (poster) (2017). Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, ser. FPGA ‘17, Monterey, California, USA, 2017
Boosting the Performance of FPGA-based Graph Processor Using Hybrid Memory Cube: A Case for Breadth First Search (2017). Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, ser. FPGA ‘17, Monterey, California, USA, 2017
Improving the Performance of OpenCL-based FPGA Accelerator for Convolutional Neural Network (2017). Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, ser. FPGA ‘17, Monterey, California, USA, 2017

Jialiang Zhang

PhD Candidate

Department of Electrical and Systems Engineering

University of Pennsylvania

Education

Publications (11)

Posts